Example embodiments relate to integrated circuit devices and a method of fabricating the same.
Generally, integrated circuit devices may include a multilayer structure of wiring lines in which the wiring lines are vertically stacked on a substrate and electrically connected with each other by contact plugs. Recently, higher integration in integrated circuit devices has reduced the gap distance between the wiring lines and the contact plugs. As such, integrated circuit devices may have an increased loading capacitance in the multilayered wiring structure. Higher loading capacitance in dynamic random access memory (DRAM) devices may significantly reduce the operational speed of the devices and/or may deteriorate refresh characteristics of the devices.